A SystemC Cache Simulator for a Multiprocessor Shared Memory System

• Autorzy: Alfred Mutanga
• Języki publikacji: EN

Abstrakty

EN

In this research we built a SystemC Level-1 data cache system in a distributed shared memory architectural environment, with each processor having its own local cache. Using a set of Fast-Fourier Transform and Random trace files we evaluated the cache performance, based on the number of cache hits/misses, of the caches using snooping and directory-based cache coherence protocols. A series of experiments were carried out, with the results of the experiments showing that the directory-based MOESI cache coherency protocol has a performance edge over the snooping Valid-Invalid cache coherency protocol. (original abstract)

Słowa kluczowe

EN

Information science; Computer systems

PL

Informatyka; Systemy komputerowe

• Czasopismo: International Letters of Social and Humanistic Sciences (ILSHS)
• Rocznik: 2014
• Tom: 2
• Strony: 75--87

Twórcy

autor

Alfred Mutanga

• University of Venda, University Road, Thohoyandou, South Africa

Bibliografia

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